1. Field of the Invention
The present invention relates to a fabrication method of a Printed Wiring Board (PWB) and more particularly, to a fabrication method of a single- or multi-layer PWB that uses the fully-additive process.
2. Description of the Prior Art
In recent years, with electronic equipment such as computers, the component mounting density and the operation speed have been becoming higher and higher. To cope with this tendency, attention has been attracted to the fully-additive process in the fabrication of a PWB, because the conductive paths or circuits are able to be formed on an insulative base material at a higher density than the case where the subtractive process is used.
The "additive process" is a process in which necessary conductive paths or circuits are added onto an insulative base material. Specifically, an insulative base material is used as a substrate and an electroless plating process or an electroplating process is used for conductive pattern formation. This "additive process" is typically applied to the formation of a multilayer PWB including multilevel conductive circuits interconnected by plated through-holes.
The "fully-additive process" is a process in which necessary conductive paths are fully added onto the insulative base material using an electroless plating process only. This process is able to form fine conductive paths having a width of approximately 25 .mu.m. An example of this process is disclosed in the Japanese Non-Examined Patent Publication No. 60-62187 published in April 1985.
The conventional fabrication methods of a PWB using the "fully-additive process" are applicable to the formation of high-density conductive patterns or paths. However, they have a problem in that the insulation reliability between the adjacent conductive patterns or paths is not satisfactory.
To solve the problem due to insulation reliability, various improved methods have been developed and disclosed, examples of which are disclosed in the Japanese Non-Examined Patent Publication Nos. 2-260691 published in October 1990 and 4-23484 published in January 1992.
In the conventional improved methods disclosed in the Japanese Non-Examined Patent Publication Nos. 2-260691 and 4-23484, a photosensitive resin compound into which particles of a plating catalyst are blended is prepared. Next, a wanted, patterned resin layer is formed onto an insulative base material by the resin compound thus prepared. Subsequently, a conductive layer is selectively deposited onto the patterned photosensitive resin layer by an electroless plating process, thereby forming conductive paths or circuits on the base material.
In these conventional methods, since the catalyst particles are blended into the photosensitive resin compound, no catalyst particles are left on the base material between the adjacent conductive paths on the patterned resin layer even for the high-density circuit patterns. As a result, the above problem relating to the insulation reliability can be solved.
However, the conventional improved methods disclosed in the Japanese Non-Examined Patent Publication Nos. 2-260691 and 4-23484 have a problem relating to the process for realizing a wanted adhesion strength between the patterned photosensitive resin layer and the conductive layer deposited thereon.
Specifically, with the conventional improved method disclosed in the Japanese Non-Examined Patent Publication No. 2-260691, the layer of the photosensitive resin compound is formed on the base material by a coating process and then, it is subjected to an optical exposure process using a photomask. Then, the optically exposed layer of the photosensitive resin compound is developed with the use of a developer solution, thereby removing its unexposed parts and surface-roughening its exposed parts.
However, the conventional improved method disclosed in the Japanese Non-Examined Patent Publication No. 2-260691 has problems as described below.
First, the exposure condition for chemically corroding the exposed parts of the photosensitive resin layer is very difficult to control.
Second, the photosensitive resin compound coated on the base material, which is in a half-cured state, tends to dissolve into a plating solution during the subsequent electroless plating process. The dissolved resin is included in the plated conductive layer, thereby degrading the property of the plated conductive layer.
Third, to provide the required surface-roughening effect, the developer solution needs to contain some regulated solvent such as chloroform, and trichloroethylene. This makes it difficult to apply this conventional method to practical use.
In the conventional improved method disclosed in the Japanese Non-Examined Patent Publication No. 4-23484, it is described that the conductive layer is deposited onto the underlying, patterned photosensitive resin layer with a satisfactory adhesion strength. However, no practical process realizing such the strength is explained therein.
Typically, the adhesion strength obtained by the conventional improved method of the Japanese Non-Examined Patent Publication No. 4-23484 will be at most approximately 0.1 kg/cm or less. This value of the adhesion strength is far from the required value.